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system-veriloguvm

When should I use uvm_config_db?


The only use with uvm_config_db is when we have more than one testbench in our system? I`ll be glad to have some explanation about this macro.


Solution

  • The uvm_config_db class (it's not a macro) has many uses besides multiple testbenches. The most common is sharing data from the top-level testbench module, like the location of interface instances, with the drivers and monitor classes that need to access the virtual interfaces.

    It also gets used for communicating data between components and sequences, not just for passing values, but notifiers when data has been set.

    You could certainly write a testbench without using the uvm_config_db, or the entire UVM for that matter. But that misses the whole point about writing testbenches for maintainability within the same testbench and reusability with other testbenches.