What are the differences between different UVM packing approaches?

Question

I wanted to know whats the difference in using these two

function void do_pack(uvm_packer packer);
  super.do_pack(packer); 
  packer.pack_field_int(correct_data_in,$bits(correct_data_in));
  packer.pack_field_int(valid_in,$bits(valid_in));
endfunction

function void do_pack(uvm_packer packer);
  super.do_pack(packer); 
  `uvm_pack_intN(correct_data_in);
  `uvm_pack_intN(valid_in);
endfunction

What happens if we dont pack/unpack the signals and directly drive them to DUT?

Furthermore, when do we use pack() and do_pack(). Can someone please exemplify.

Answer 1

Generally in bus protocol, you will be having large amount of data on a specific bus transaction and hence it becomes very difficult to extract the specific field value from that bus transactions.

Hence you use classes on higher level, so that by using different fields, it becomes easy for you to control the value of those fields.

But in real hardware, everything goes in terms of bit patterns and so you need to convert your class fields into valid bit patterns as per your protocol and transmit them along the bus.

For that purpose you require pack and unpack methods. You pack stuffs in transmitter side and unpack them in receiver side.