UVM- can single driver and a single monitor be connectes to multi interfaces?

Can a single driver and a single monitor be connected to multiple interfaces?

Solution

Yes. but not usually a good idea for re-usability. If the interfaces are required to be used together, then it may make more sense.

How to define an enum type and include it in multiple modules?
Verilog parsing between logical and bitwise not (!/~)
Correct syntax of SystemVerilog $display to produce formatted messages in Quartus message window
Why the test bench module doesn't work as intended?
Cadence IUS simulator options
localparam of struct type - using default values - still requires initializer?
Usage of 'begin/end' in design modules
How to fix this part-select error? Illegal operand for constant expression
Setting a starting position for the constraint random solver
Find minimum in array of numbers using Verilog for Priority Queue implementation
How to print topology in UVM?
LED Sequence on Basys3 with Verilog
How to create an interface which is an array of a simpler interfaces?
Is it possible to create task within interface for specific modport?
Do delta cycles occur at intermediate stages in SystemVerilog?
Formal verification of synchronous FIFO with failing SystemVerilog assertion
Connecting output of 4-bit counter to Hex to 7-Seg decoder and creating testbench
Weird Behavior of buffers in modelsim simulation
Vivado behavioral simulation results differ on different PCs, but synthesis results are the same
Bluespec Verilog - polymorphic vector type
Does the SystemVerilog standard allows mixing with Verilog files?
Why am I not getting output after pass through design in testbench module driver and monitor?
Implicit net-type declaration and `default_nettype
Is there a way to condition on a type?
How to generate a 'glitchy' signal in the systemverilog class
Error (10170): HDL syntax errors in Quartus (HDL)
Error Illegal combination of driver and procedural assignment to variable inStream detected
Ternary operation not working with unary operation
Reading parameter array through VPI
Is there a way to 'map' arrays?