VSC use Code Runner to run code with a makefile?

Question

I’m taking a class where we are learning c, our professor told us to install bash in wsl and to use makefiles to run our code.

I often have small mistakes in my code the first time I run, so it is frustrating having to type: $ make filename $ ./filename

Especially because I’m dyslexic and often misspell my filename. I’m therefore looking for a faster way to execute my code using a makefile. Something like the extension code runner which I used before taking the class were all I had to do was hit ctrl + alt + n.

Answer 1

You can have a target to run your code: Imagine this simple Makefile:

my_prog_objs = a.o b.o c.o
my_prog_args = a b c
my_prog_out  = my_prog.out

.PHONY: all clean run

all: my_prog
clean:
    rm -f my_prog $(my_prog_objs)

# THIS IS THE IMPORTANT TARGET, first builds the
# program, then runs it.
run: my_prog
    my_prog $(my_prog_args) >$(my_progs_out)

my_prog: $(my_prog_objs)
    $(CC) $(CFLAGS) $(LDFLAGS) -o $@ $($@_objs)

by using make you get everything built, but running make run you build everything and run my_prog with the arguments shown in the Makefile (a b c) and the output redirected to my_prog.out and this will save a lot of typing if you need to test it.