Add delay between sampling and checking

Question

I have written an assertion property. I want to add delay between sampling and checking action.

Basically below assertion says that assert_sig should be stable when sig1 or sig2 1.

property check_assert(assert_sig, assert_sig_dis);
    @(assert_sig)
    disable iff(!lane_assertion_enabled || assert_sig_dis)
    ((sig1!==1'b1) && (sig2!==1'b1));
  endproperty

Now the issue is assert_sig de-assert same time as sig1 asserts. That's why the assertion fails. I want to add a delay of 1ps between checking action and sampling. Is it possible? Or any other approach would also be appreciated. Thanks in advance.

Answer 1

Clocking blocks provide sampling skew

clocking as @(assert_sig)
input #1ps sig1;
endclocking

Then use as.sig1 in your property.