I have created a testbench for a simple positive edge triggered d flip flop with synchronous active-low reset. In the testbench, the first case gives inputs at @(posedge clk)
, and in the second case, I am giving inputs based on #10ns
statements.
In the first case, the output of the flop changes after 1 clock cycle, whereas in the second case, it changes immediately in the same clock cycle in the simulator.
Why?
I am simulating in the Quartus Simulator.
Code:
initial
begin
//Case 1: Using Event Based statements
n_reset = 1'b0;
reset = 1'b1;
d = 1'b0;
repeat(2)@(posedge clk);
n_reset = 1'b1;
repeat(2)@(posedge clk);
d = 1'b1;
@(posedge clk);
d = 1'b0;
@(posedge clk);
d = 1'b1;
//Case 2: Using wait Statement
#50ns;
n_reset = 1'b0;
reset = 1'b1;
d = 1'b0;
#50ns;
n_reset = 1'b1;
#20ns;
d = 1'b1;
#10ns;
d = 1'b0;
#10ns;
d = 1'b1;
#50ns;
end
Using wait Statement:
Delays the execution of a procedural statement by specific simulation time.
"#<_time> <_statement>;"
Using Event Based statements:
Delays execution of the next statement until the specified transition on a signal.
@ (< posedge >|< negedge > signal) < statement >;
Level-Sensitive Even Controls ( Wait statements ):
Delays execution of the next statement until < expression > evaluates to true
wait (< expression >) < statement >;
Now I think you are able to differentiate, Right?