N-to-1 parameterizable multiplexer code when N=1

I am trying to code for a N-to-1 Parameterizable Multiplexer design where N could be 1-8. this is what I have got so far:

module param_mux
#(
   parameter N = 2
)
(
   input  logic [3:0] i_data [N-1:0],
   input  logic [2:0] sel, //the select pin is fixed at 3 bits since maximum N will be 8
   output logic [3:0] o_data
);
   assign o_data = i_data[sel];

endmodule

This seem to work except when N=1. For N=1, I would like the o_data to be 'b0 when sel is not 0. i.e:

if sel == 0, then o_data = i_data[0]  
else o_data = 'b0

Any help would be greatly appreciated.

Solution

Since you want different behavior based on a parameter value, you can use a generate if statement. Refer to IEEE Std 1800-2017, section 27.5 Conditional generate constructs:

module param_mux
#(
   parameter N = 2
)
(
   input  logic [3:0] i_data [N-1:0],
   input  logic [2:0] sel, //the select pin is fixed at 3 bits since maximum N will be 8
   output logic [3:0] o_data
);

if (N == 1) begin
   assign o_data = (sel) ? '0 : i_data[0];
end else begin
   assign o_data = i_data[sel];
end

endmodule

The generate/endgenerate keywords are optional.