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verilogsystem-verilog

2 consecutive nonblocking assignments

Can someone explain what it means to assign two consecutive nonblocking assignments in a sequential always block?

For example:

always @(posedge clk) begin
    a <= b <= c;
end
Solution

  • That can be more clearly coded as:

    a <= (c >= b);

    a is assigned the value of the expression "c is greater than or equal to b".

    The 1st <= is the nonblocking assignment operator, whereas, the 2nd is the comparison operator.