For a given project I encountered with floating point multiplication in verilog. So I used from IP cores of Xilinx in ISE 14.7 with following configurations for floating point IP core GUI:
so when I give the following inputs in ieee 754 format
A = 0_0111111_000000000000000000000000 (which is one)
B = 0_0111111_000000000000000000000000
the result after 8 clock cycles is :
0_0111110_100000000000000000000000
my question is why the result is not one in ieee 754 format? who is wrong?
This is how your first number decodes:
3 2 1 0
1 09876543 21098765432109876543210
S ---E8--- ----------F23----------
Binary: 0 01111110 00000000000000000000000
Hex: 3F00 0000
Precision: SP
Sign: Positive
Exponent: -1 (Stored: 126, Bias: 127)
Hex-float: +0x1p-1
Value: +0.5 (NORMAL)
So, its value is 0.5
, not 1
as you claimed.
This is how the product decodes:
3 2 1 0
1 09876543 21098765432109876543210
S ---E8--- ----------F23----------
Binary: 0 01111101 00000000000000000000000
Hex: 3E80 0000
Precision: SP
Sign: Positive
Exponent: -2 (Stored: 125, Bias: 127)
Hex-float: +0x1p-2
Value: +0.25 (NORMAL)
So, it's 0.25
. And that is correct since 0.5 * 0.5 = 0.25
indeed.
If you want to test multiplying 1 * 1 = 1
use the following encoding:
3 2 1 0
1 09876543 21098765432109876543210
S ---E8--- ----------F23----------
Binary: 0 01111111 00000000000000000000000
Hex: 3F80 0000
Precision: SP
Sign: Positive
Exponent: 0 (Stored: 127, Bias: 127)
Hex-float: +0x1p0
Value: +1.0 (NORMAL)
i.e., 0_01111111_00000000000000000000000
which is how the number 1.0
is encoded as an 32 bit single-precision IEEE754 floating point value. Note in particular that the exponent is 8-bits, which seems to be the source of the issue in your original encoding where you have 7 bits.