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verilognaming-conventionsterminologyhdl

Why are instantiated modules often given the net name "u"?


In industry and in many tutorials such as this one (counter U(clk,enable,reset,data);) and this one (adder_hier U (result,carry,r1,r2,ci);), modules are often called u or given the prefix/suffix u_. I've always accepted this but I'm not sure what it stands for.

What's this u mean? I can't find any info online and it's a tricky thing to google.

Edit: I realize that this isn't an explicit programming question, but SO has tags for terminology and naming conventions so I think it's appropriate to ask. This has been flagged for "opinion based" which I certainly don't think it is.


Solution

  • This comes from an IEEE/ASME standard for naming components (reference designators) on a printed circuit board: R-resistor, C-capacitor, U-Integrated Circuit. I'm assuming like in many other standards, I and O are not used because they are too easily confused with 1 and 0.

    As schematics gradually evolved from PCBs to ICs, this naming convention stuck.

    See https://www.asme.org/products/codes-standards/reference-designations-for-electrical-and-electron and https://standards.ieee.org/standard/315-1975.html