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system-verilogquartusceil

Using $ceil to define a parameter in SystemVerilog in Quartus Prime

Trying to do this

parameter integer PRECHARGE_CLOCKS = $ceil(PRECHARGE_NS / CLOCK_PERIOD_NS);

And then use the value in a comparion

if(InitPrechargeCounter < PRECHARGE_CLOCKS - 1)

But getting this error 

Error (10174): Verilog HDL Unsupported Feature error at Ram.sv(23): system function "$ceil" is not supported for synthesis

Is there a way around this so that I get the value calculated at compile time?
Using some different language construct instead of parameter?

Solution

  • I ended up working around this with the following macro, this creates 2 extra parameters for the sake of rounding up, but this is the best solution I've found so far. This is not limited to integer arguments and works with real numbers. I've tested this with Quartus and Modelsim

    `define Ceil(ParamName, Expression) \
 parameter ParamName``_F = Expression;\
 parameter integer ParamName``_R = ParamName``_F;\
 parameter integer ParamName = (ParamName``_R == ParamName``_F || ParamName``_R > ParamName``_F) ? ParamName``_R : (ParamName``_R + 1);

    And then instead of

     parameter integer AUTOREFRESH_CLOCKS = $ceil(UTOREFRESH_NS/CLOCK_PERIOD_NS);

    You would invoke the macro

    `Ceil(AUTOREFRESH_CLOCKS, UTOREFRESH_NS/CLOCK_PERIOD_NS)

    And this is not both synthesizable in Quartus and works in Modelsim