I am designing a simple IC tester using the DE1 altera board, and I really want to implement a simple user interface which a user can use to input variables into the VHDL program (e.g a small C++ app/form/yougetmypoint) so my basic idea is:
1) start FPGA (after programming)
2) FPGA launches app on PC screen asking for some simple info
3) user enters info, and it is implemented in the VHDL code.
4) from there it conducts some tests.
Basically I wanna know if this is even a possibility? At least if it is possible to implement this in a simple way perhaps using a UART? I've only been learning VHDL for a few days, so please be patient if this is dumb.
Looks like you don't get the idea of FPGA and VHDL.
You cannot implement in VHDL any user interface, that will show up in PC. VHDL is not programming language, but hardware description language. What you write in VHDL is code, that describes what FPGA does. You specify functions, and then some tool translates (synthesizes) it to digital electronic circuit. In this circuit all kind of FPGA's stuff is used - LUT tables, registers, buffers, etc. When you launch FPGA and program it, you send it bitstream file, with instruction how all this elements has to be connected to do what you specify in VHDL. It has nothing to do with program, that you can launch on PC.
To do what you want, you can implement UART interface in FPGA, and connect it to PC using some USB to UART converter. Then you can write some app in whatever programming, or scripting language you prefer (for example C++, or Python). In this program you can get some input from user, and send it via UART to FPGA.