We have using RedHawk v2.1 on Xynq7035 ARM COretex A9 with Embedded Linux kernel 3.14. Our application is SSB Tx/Rx SDR. So waveforms consist of 3 types, one is SSB RX, two is SSB TX, three is CW TX. The HW device has 6 dataFloat ports and 6 dataUlong ports, each with a total of 12 ports. Start up procedure is below.
#nodeBooter -D &
#nodeBooter -d /usr/lib/redhawk/sdr/dev/nodes/dev_trx_node/DeviceManager.dcd.xml &
#rh_start.py &
rh_start.py code is below.
from ossie.utils import redhawk
import logging
logging.basicConfig()
domain_list = redhawk.scan()
dom = redhawk.attach(domain_list[0])
wave0 = dom.createApplication("/waveforms/rx_waveform/rx_waveform.sad.xml")
dom.devices[1].connect(wave0.comps[0], usesPortName='out_data_rx', providesPortName='in_data' )
The error is occered when connecting the device and waveform port. Error code is
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataFloat:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataFloat:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataFloat:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataUlong:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataUlong:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataUlong:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataFloat:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataFloat:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataFloat:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataUlong:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataUlong:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:BULKIO/dataUlong:1.0
ERROR:ossie.utils.model:Unable to find port description for IDL:CF/Port:1.0
ERROR:ossie.utils.model:Invalid port descriptor in scd for IDL:ExtendedEvent/MessageEvent:1.0enter code here
The error is on all the ports of my device and all ports of GPP. My device is created with RedHawk-IDE v2.1. GPP downloads v2.1 and cross-compiles. GPP.scd.xml has no changed. Is the scd.xml file wrong? our device ports section in scd.xml file is below.
<ports>
<provides repid="IDL:BULKIO/dataFloat:1.0" providesname="in_data_cw">
<porttype type="data"/>
</provides>
<uses repid="IDL:BULKIO/dataFloat:1.0" usesname="out_data_cw">
<porttype type="data"/>
</uses>
<provides repid="IDL:BULKIO/dataFloat:1.0" providesname="in_data_rx">
<porttype type="data"/>
</provides>
<uses repid="IDL:BULKIO/dataFloat:1.0" usesname="out_data_rx">
<porttype type="data"/>
</uses>
<provides repid="IDL:BULKIO/dataFloat:1.0" providesname="in_data_tx">
<porttype type="data"/>
</provides>
<uses repid="IDL:BULKIO/dataFloat:1.0" usesname="out_data_tx">
<porttype type="data"/>
</uses>
<provides repid="IDL:BULKIO/dataUlong:1.0" providesname="in_cnt_cw">
<porttype type="data"/>
</provides>
<uses repid="IDL:BULKIO/dataUlong:1.0" usesname="out_cnt_cw">
<porttype type="data"/>
</uses>
<provides repid="IDL:BULKIO/dataUlong:1.0" providesname="in_cnt_rx">
<porttype type="data"/>
</provides>
<uses repid="IDL:BULKIO/dataUlong:1.0" usesname="out_cnt_rx">
<porttype type="data"/>
</uses>
<provides repid="IDL:BULKIO/dataUlong:1.0" providesname="in_cnt_tx">
<porttype type="data"/>
</provides>
<uses repid="IDL:BULKIO/dataUlong:1.0" usesname="out_cnt_tx">
<porttype type="data"/>
</uses>
</ports>
The application itself works, but could you tell us the cause of the error and the workaround?
it seems IDL:BULKIO/dataFloat:1.0
is not present in the IDL library according to the line 1266 of model module init. Check if IDL library exists in the path: $OSSIEHOME/share/idl
. also check if your scd file has something like:
<interface name="ProvidesPortStatisticsProvider" repid="IDL:BULKIO/ProvidesPortStatisticsProvider:1.0"/>
<interface name="updateSRI" repid="IDL:BULKIO/updateSRI:1.0"/>
<interface name="dataFloat" repid="IDL:BULKIO/dataFloat:1.0">
<inheritsinterface repid="IDL:BULKIO/ProvidesPortStatisticsProvider:1.0"/>
<inheritsinterface repid="IDL:BULKIO/updateSRI:1.0"/>
</interface>
inside the interfaces tag.
a tip: ports can use core-framework IDLs, besides IDL:BULKIO
, you can use IDL:CF/Resource
to control a component, IDL:CF/Device
to control a Device. you are even able to get a reference of the Domain using ports. This way, you can create a single waveform for the SSB (TX and RX) implemeting a proper Assembly controller, to dictate the way your waveform works.
Are you using a ADRV9361 (picozed sdr)? if so... you could evaluate my FrontEnd Device AD936X_LIBIIO... how did you embed (cross compiled) in Zynq REDHAWK?