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csystem-verilogvpi

SystemVerilog looping through hierarchy

I have registers instantiated in a Register block Regblock as such:

DUT.Regblock.Register1
DUT.Regblock.RegisterA
DUT.Regblock.RegisterABC
...

All these registers have the same inner structure. I would like to simulate the effects of bit flips in these registers.

//Here an attempt to do bit flips
bitFlipLocation = $random;
force  DUT.RegBlock.Register1.reg[bitFlipLocation] = ~DUT.RegBlock.Register1.reg[bitFlipLocation];
release DUT.ABCStar1.RegBlock.Register1.reg[bitFlipLocation];

Is there a way to create a loop over all DUT.Regblock.Register1, RegisterA, RegisterABC, ... inside RegBlock and create these bit flips?

Solution

  • There are ways to do this, but not within the SystemVerilog language itself. You can write VPI code in C to iterate over block names and apply the forces use the C API. Or you can use tool specific commands to iterate of block names and use commands (usually Tcl) to apply the forces.

    Both of those are beyond the scope of what can be shown in this forum.