I am receiving the following error: This construct is only supported in VHDL 1076-2008. I don't know why. I want this code to synthesise, but the flag may cause problems.
The aim of the flag is that as soon as data is output, it cannot be overwritten in later iterations. Ideally I want the inner loop to exit as soon as data is output, but that won't synthsise.
for j in 0 to n-1 loop --For loop outputting data
flag:='0'; --reset the flag
for i in 0 to n-1 loop
flag:='1' when (a=b) else '0';
Output(j)<=a when flag='1' else '0';
end loop;
end loop;
The when
else
construct was not allowed inside a process until VHDL-2008. To cure this, replace it with an if
statement.