chisel hdl vector range assignment

I am new to Chisel HDL. I have a question regarding to Vec assignment. Suppose I have a Vec has n elements, and each one has w-bit SInt,

How can I assign a range of elements, let's say I have two Vec: a = Vec(10, SInt(width=8)), I have b = Vec(3, SInt(width=8)), How can I assign b := a(2:4)?

I know I can do it in for loop, is there any more elegant way to do it? I haven't find any example code or materials on it

Solution

Seems you are looking for a slice function in Vec. Glancing through the Vec class I could not find such a function.

So the short answer is no, there is no elegant way to do this out-of-the-box.

The second most elegant thing is then to put such a function in your project's util library and try to eventually get this function upstreamed.

Implementing it in Chisel3 might look something like this:

class FooTester extends BasicTester {
  def slice[T <: Data](someVec: Vec[T], startIndex: Int, endIndex: Int) : Vec[T] = {
    Vec( for (i <- startIndex to endIndex) yield someVec(i) )
  }

  // An initialized Vec
  val a = Vec(
    Range(0, 10)
      .map(SInt(_, width=8))
  )

  // A declared Vec
  val b = Wire(Vec(3, SInt(width=8)))

  b := slice(a, 2, 4)

  assert(b(1) === SInt(3, width=8))

  when(Counter(10).inc()) {stop()}
}