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Chisel: Why do I get a warning when output of Mux is of type SInt?


The code compiles correctly but I get a warning:

[warn] PC_RVI.scala:22: Mux of Bits instantiated, emits SInt in class TOP_pack.PC_RVI

the part of the code giving the warning looks like this:

PC_input1 := Mux(io.branch, io.imme, UInt(4))
PC_input2 := Mux(io.PC_or_rs1, io.rs1, PC_reg)

where imme and rs1 are of type SInt.


Solution

  • All your signals must be of the same type SInt. As we see on the given code is not same :

    PC_input1 := Mux(io.branch, io.imme, UInt(4))
    

    io.imme is a SInt() and UInt(4) not. Is your PC_input1 is a SInt() ?

    If you want to avoid warnings use the same type for all variables.