Is it written in VHDL or Verilog

Question

I am new to HDL and just wanted to confirm whether these lines of code are written in VHDL or Verilog?

DE0_SOPC DE0_SOPC_inst(
                        // 1) global signals:
                         .clk(CLOCK_50),
                         .pll_cpu(),
                         .pll_sdram(DRAM_CLK),
                         .reset_n(system_reset_n));

Answer 1

Yes. These are verilog code lines. As per your previous comments, Type: .v files belong to verilog codes.