This is the test bench
`timescale 1 ps/ 1 ps
module sum_fix_vlg_tst();
reg select;
reg [7:-8] valor_a;
reg [7:-8] valor_b;
// wires
wire [8:-8] result_fx;
sum_fix i1 (
.result_fx(result_fx),
.select(select),
.valor_a(valor_a),
.valor_b(valor_b)
);
initial
$monitor ("valor_a = %b, valor_b = %b, result_fx = %b", valor_a,
valor_b,result_fx);
initial
begin
#10
select = 1;
valor_a = 32'b0000000011111111;
valor_b = 32'b0000000011111111;
#20
valor_a = 32'b1111111111111111;
valor_b = 32'b1111111111111111;
#30
valor_a = 32'b1001100111001000;
valor_b = 32'b0001111000111101;
end
endmodule
And this is the uut
`timescale 1 ps/ 1 ps
module sum_fix (valor_a,valor_b,result_fx,select);
input [7:-8] valor_a,valor_b;
output reg [8:-8] result_fx;
input select;
always@ (valor_a or valor_b)
begin
if (select==1)
result_fx = valor_a + valor_b;
else
result_fx = valor_a - valor_b;
end
endmodule
Compiled in Quartus well. Then I launch Modelsim like this: Tools > RTL simulation. It launch Modelsim but it only gives me a lot of zzzzzzzzzzzzz in input and xxxxxxxxxxxxxx in output without anything in the wave.
I want to say that I'm not sure if I added this testbench correctly to the project. I'm a beginer. What I did was: Assignments > Settings > Compile Test: click Test Benches > new, looked for the file and add, and ok. I'm not sure that this is the correct way, because it looks too complex. Please help on this.
Also, I comment that I initiate the test bench writter template in quartus, but I ended changing everything from the file, final result is the code above.
So, I tried your code on EDAPlayrgound (http://www.edaplayground.com/x/Cyc), and it looks fine to me. (You an give it a run for yourself, if you'd like).
You're seeing X
's because at time 0, you haven't specified values for any of your inputs (since you delay 10 timesteps before assigning anything). Consider either removing the first #10
, or putting some assignments before it.
(X
= Unknown Value; Z
= High Impedance, which means neither a 1 nor a 0 input).
As for setting it up in Quartus, the way you did it was correct.