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scalahdlchisel

Does ChiselHDL supports something like #ifdef (macro)?

I've googled that Scala uses "@elidable" as a kind of macro in C++.
Does ChiselHDL also support something like this for debugging?
Or, any other alternatives?

in scala contexts,

@elidable(WARNING) def debug(signal: Wire) = when(signal){ printf("Cache miss!") }
debug(miss)  // At every rising edge of clock, print whether there's cache miss or not.

Suppose Chisel has the preprocessor and #ifdef statement 

#define DEBUG
#ifdef DEBUG
    when(is_cache_miss){ printf("Cache miss!") }
#endif
Solution

  • You should use Scala code as your Chisel ifdef system.

    if (DEBUG) // <<--- this is a Scala conditional, run at chisel build-time
    when (is_cache_miss) { printf("Cache miss!") } // << --- Chisel conditional. Executes every cycle of simulation.