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debuggingverilogquartus

How to debug Cyclone II FPGA board in Quartus II

I'm writing a program in Verilog and have some variables that I would like to see the values of as the program is running on my Cyclone II board, but I can't figure out where the console is (if there is one...). Is there any way to do this? I've read about the $display function but can't figure out where the output would be in Quartus II. Unfortunately, I can't seem to find very much information on this. Thanks for any help!

Solution

  • Verilog has two main uses:

    • It's an HDL (hardware description language) that is used to describe synthesizable logic. This is the part you use to make an FPGA or an ASIC.
    • It's a scripting language used to test and validate hardware designs through simulation.

    For some reason most online tutorials you will find do not emphasize that distinction. They often start with part 2 (which includes things like $display) because newcomers are trying things in a simulator. The constructs used for scripting simply have no effect when the code goes through synthesis to be used in an FPGA. There is some slight overlap, but even that does not work how you might expect. If you write a for loop in a simulator it will loop like any other programming language. If you put synthesizable code inside that loop it will be replicated by the loop (creating a whole bunch of parallel FPGA paths, one for every pass through the loop). So the scripting parts that actually affect synthesis can be thought of more like metaprogramming.

    You could implement (or find an existing implementation, called "IP" in HDL land) a UART and print out data yourself, but this is a very complex and costly (in terms of FPGA area) exercise in an FPGA. Typically to debug an FPGA you bring out debug pins and look at them with an oscilloscope or logic analyzer (even an inexpensive one like the Saleae logic). This is extremely cheap in terms of FPGA resources. Another possibility is to log the debug data inside the FPGA in a block RAM and read it out later. Both Altera (with SignalTap) and Xilinx (with Chipscope) provide both the FPGA code and the GUI to drive it via the JTAG port. Quartus II should give you a free license for SignalTap as long as you agreed to share anonymous statistics with them. Last I knew, Chipscope was not free, and that is why my hobby projects always use Altera FPGAs.