I have been pouring through documentation as part of my quarter long project to develop a simple disk driver. At the moment I am trying to map out the various atapi and IDE controller registers implemented inside the Intel 82801EB IO controller.
First of all, the document I am referring to: www.intel.com/assets/pdf/datasheet/252516.pdf
On page 415, table 154 shows the offsets of various configuration registers. This may seem like a silly question, but how do I find where they are offset from? I was expecting to find some sort of fixed base address reserved for these registers. From there I would be able to use this table build my driver.
For example, on table 154 the PCI command register is located at offsets 04-05h. The register is detailed on page 417, which I believe I am understanding. However, where is the base address that this register is located 4 bytes from?
Update: Now, after looking back at the fixed IO map for the D865PERL board that we are using, it says that 0000-00ffh is reserved by the B865PERL, and to refer to the ICH5 data sheet for dynamic addressing information. Which I believe may be used for the IDE controller register from table 154 I mentioned above. At this point I emailed my professor but I am still trying to figure out where these are located.
Thanks for looking!
Turns out I never had to find an actual address, but the bus/device/function number of the IDE controller.
Basically, once you have a bus, device, and function (along with a register offset), you can write that info into the PCI CONFIG_ADDRESS register (cf8h) and read the register contents from CONFIG_DATA (cfch).