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vhdl

How to use 3-input logic gates in vhdl?

I am just learning vhdl, and am trying to use a 3-input nand gate. The code I have is:

G => (A nand B nand C) after 3 ns;

but this does not compile.

Solution

  • I'm not an expert on VHDL but I think you have a couple of mistakes there - it should probably be:

    G <= not (A and B and C) after 3 ns;

    i.e. the assignment is in the wrong direction and I'm not sure that nand commutes in the way that you need it to for 3 inputs, hence the use of and for the inputs and then not to invert the output.