`vmovdqu8` / 16 / 32 / 64 instructions and `_mm_loadu_epi8` / 16 / 32 / 64 intrinsics purpose

Question

There is movdqu available via _mm_loadu_si128 that requires SSE2.

There is vmovdqu8 (16, 32, 64) available via _mm_loadu_epi8 (16, 32, 64) available via AVX512BW + AVX512VL or AVX512F + AVX512VL.

What is the purpose of the later if they apparently do the same?

If the purpose is the mask, then why are unmasked _mm_loadu_epi8 exposed as intrinsics?

Answer 1

Mostly summarized the answer already given in the comments:

• The instructions exist only to support masked operations, so the non-masked intrinsics are generally useless. They may have been defined for orthogonality
• gcc has chosen not to expose at least a part of useless intrinsics; see error: '_mm512_loadu_epi64' was not declared in this scope
• They could have been potentially useful to mark AVX512 code paths for compilers that allow using any instrinsics without requiring CPU features in compiler options or otherwise, but actually isn't useful this way.
  • In Intel compiler it doesn't work this way, instead there's _allow_cpu_features to mark codepaths
  • In MSVC it doesn't always work, see How does MSVC avoid mixing SSE and AVX?
  • In particular this does not work in MSVC for _mm_loadu_epi8 in question, see https://godbolt.org/z/9aaha1h8r
• So far these unmasked intrinsics presence only creates confusion, don't use them