I am designing a Chisel module with the following code:
import chisel3._
import chisel3.util._
class DisplayDriver extends Module {
val io = IO(new Bundle {
val digits = Input(Vec(4, UInt(4.W)))
val leds = Output(UInt(7.W))
val selector = Output(UInt(4.W))
})
// Divisor de frecuencia
val freqDiv = RegInit(0.U(11.W))
val tick = freqDiv === (4000 - 1).U
freqDiv := freqDiv + 1.U;
when (tick) {
freqDiv := 0.U
}
// Multiplexor de dígitos
val digitSel = RegInit(0.U(2.W))
when (tick) {
digitSel := digitSel + 1.U
}
val digit = UInt(4.W)
digit := io.digits(digitSel)
// Decodificador para el selector
io.selector := 0.U
switch (digitSel) {
is (0.U) { io.selector := "b1110".U }
is (1.U) { io.selector := "b1101".U }
is (2.U) { io.selector := "b1011".U }
is (3.U) { io.selector := "b0111".U }
}
// Decodificador para los leds
io.leds := 0.U
switch (digit) {
is (0.U) { io.leds := "b0000001".U }
is (1.U) { io.leds := "b1001111".U }
is (2.U) { io.leds := "b0010010".U }
is (3.U) { io.leds := "b0000110".U }
is (4.U) { io.leds := "b1001100".U }
is (5.U) { io.leds := "b0100100".U }
is (6.U) { io.leds := "b0100000".U }
is (7.U) { io.leds := "b0001111".U }
is (8.U) { io.leds := "b0000000".U }
is (9.U) { io.leds := "b0000100".U }
is (10.U) { io.leds := "b0001000".U }
is (11.U) { io.leds := "b1100000".U }
is (12.U) { io.leds := "b0110001".U }
is (13.U) { io.leds := "b1000010".U }
is (14.U) { io.leds := "b0110000".U }
is (15.U) { io.leds := "b0111000".U }
}
}
class Top extends Module {
val io = IO(new Bundle {
val leds = Output(UInt(7.W))
val selector = Output(UInt(4.W))
})
val displayDriver = Module(new DisplayDriver())
displayDriver.io.digits(3) := 1.U
displayDriver.io.digits(2) := 2.U
displayDriver.io.digits(1) := 3.U
displayDriver.io.digits(0) := 4.U
io.leds := displayDriver.io.leds
io.selector := displayDriver.io.selector
}
But I get the following error when running it:
[error] (run-main-0) chisel3.package$ExpectedHardwareException: data to be connected 'UInt<4>' must be hardware, not a bare Chisel type. Perhaps you forgot to wrap it in Wire(_) or IO(_)?
[error] chisel3.package$ExpectedHardwareException: data to be connected 'UInt<4>' must be hardware, not a bare Chisel type. Perhaps you forgot to wrap it in Wire(_) or IO(_)?
which apparently points to the line
digit := io.digits(digitSel)
I have tried many combinations with Wire around io.digits but it still does not compile. Indeed, following other examples, I am not able to see why I'm getting this error, since the vector is inside an IO. What is happening?
The error comes from the left hand side of the connect operation: digit
should be defined as Wire
.
val digit = Wire(UInt(4.W))
digit := io.digits(digitSel)