GHDL testbench build error - how can I fix it?

Question

I am a beginner in VHDL. I am using GHDL to implement my VHDL code on and to test it. I wrote a simple VHDL Behavioral Code for XOR Gate. I am trying to write a testbench to test the XOR Gate.

XOR VHDL Code:

library ieee;
use ieee.std_logic_1164.all;

entity XORGate is
port(
    xora, xorb : in std_logic;
    xorout : out std_logic
);
end XORGate;

architecture behave of XORGate is
begin
   process(xora, xorb)
   begin
       xorout <= xora xor xorb;
   end process;
end behave;

XOR Testbench VHDL Code:

library ieee;
use ieee.std_logic_1164.all;

entity XORGate_tb is
end XORGate_tb;

architecture structural of XORGate_tb is
component XORGate
   port(
      xa, xb : in std_logic;
      xout : out std_logic
   );
end component;

signal xa, xb, xout : std_ulogic;

begin
xorgate1 : XORGate port map(xa, xb, xout);
process
  begin
     xa <= '0';
     xb <= '0';
     wait for 100 ns;

     xa <= '0';
     xb <= '1';
     wait for 100 ns;

     xa <= '1';
     xb <= '0';
     wait for 100 ns;

     xa <= '1';
     xb <= '1';
     wait for 100 ns;

     assert false report "Reached end of test";
     wait;
end process;
end structural;

When I use the following commands: "ghdl -s XORGate_tb.vhdl" to check the syntax "ghdl -a XORGate_tb.vhdl" to analyze the file no errors are given. When I use the following command "ghdl -e XORGate_tb" I get the following errors

XORGate_tb.vhdl:18:1:error: for default port binding of component instance "xorgate1":
XORGate_tb.vhdl:18:1:error: signal interface "xa" has no association in entity "xorgate"
XORGate_tb.vhdl:18:1:error: signal interface "xb" has no association in entity "xorgate"
XORGate_tb.vhdl:18:1:error: signal interface "xout" has no association in entity "xorgate"

I am unable to fix the error. Tried changing signal names and still got the same error. How can I fix the above error?

Answer 1

The port names in the entity do not match the component. In the component you have xa, xb and xout. But in the entity they are xora, xorb and xorout.

To avoid issues like this, I recommend using direct instantiation as mismatches between an instantiation and the entity are a syntax error and you can simply delete the component and not have what is effectively the same code in two different places:

xorgate1 : entity work.XORGate port map(xa, xb, xout);