In 2016, ARM introduced the ARMv8-M architecture as an upgrade to the popular ARMv6-M (Cortex M0/M0+/M1) and ARMv7-M (Cortex M3/M4/M7) architectures. The ARMv8-M architecture is again split into a Baseline profile seen as a continuation of the ARMv6-M architecture and a Mainline profile seen as a continuation of the ARMv7-M architecture.
Cursory examination of the ARMv8-M Architecture Reference Manual unfortunately yields no insights into what exactly was added and there doesn't seem to be a useful summary of what changed in comparison to the previous version of the architecture. And as usual for new versions of CPU architectures, it appears that almost all details are unchanged with only small additions here and there.
What additional instructions and instruction variants does ARMv8-M Baseline provide over ARMv6-M?
The ARM document titled Cortex-M for Beginners may provide the information you are looking for, more specifically at pages 6 and 7.
ARMv6-M provides the 16 bit instructions ADC, ADD, ADR, AND, ASR, B, BIC, BKPT, BL, BLX, BX, CMN, CMP, CPS, EOR, LDMIA, LDR, LDRB, LDRH, LDRSB, LDRSH, LSL, LSR, MOV, MUL, MVN, NOP, ORR, PUSH, REV, REV16, REVSH, ROR, RSB, SBC, SEV, STMIA, STR, STRB, STRH, SUB, SVC, SXTB, SXTH, TST, UDF, UXTB, UXTH, WFE, WFI, and YIELD.
Additionally, 32 bit instructions BL, DMB, DSB, ISB, MRS, and MSR are available.
To these, ARMv8-M baselines adds...
SDIV and UDIVB (for extended range)CBZ and CBNZMOVW and MOVT for loading constants (as an alternative to LDR Rd, =...)LDA, LDAB, LDAH, STL, STLB, and STLHLDAEX, LDAEXB, LDAEXH, STLEX, STLEXB, and STLEXHCLREX, LDREX, LDREXB, LDREXH, STREX, STREXB, and STREXHIf additionally the security extension is implemented, the instructions BLXNS, BXNS, SG, TT, TTT, TTA, and TTAT are available.