How can I read the interrupt status of a specific INTID in aarch64? I want to know the state (inactive/active/pending/active-pending) of an FIQ interrupt (for example INT 208).
There is "ARM® Generic Interrupt Controller, Architecture Specification" document.
It describes register structure of GIC and contains information you are looking for
The GICD_ICACTIVERs provide a Clear-active bit for each interrupt that the GIC supports. Writing to a Clear-active bit Deactivates the corresponding interrupt. These registers are used when preserving and restoring GIC state.
[31:0] Clear-active bits For each bit:
Reads
0 The corresponding interrupt is not activea.
1 The corresponding interrupt is active. <--- here
Writes
0 Has no effect.
1 Deactivates the corresponding interrupt, if the interrupt is active. If the interrupt is already deactivated, the write has no effect. After a write of 1 to this bit, a subsequent read of the bit returns the value 0.