Assume we have a 32 bit std_logic_vector
of data. I want to add a logic '0'
between every 2 bits.
Take for example; all ones 11111....1111
is going to be 101010101....1010101.
You can add the '0'
in between with a function:
function add_zeros(std_logic_vector_in : std_logic_vector) return std_logic_vector is
variable std_logic_vector_out : std_logic_vector(std_logic_vector_in'length*2 -2 downto 0);
begin
for i in std_logic_vector_in'range loop
std_logic_vector_out(i*2) := std_logic_vector_in(i);
if (i /= std_logic_vector_in'length-1) then
std_logic_vector_out(i*2+1) := '0';
end if;
end loop;
return std_logic_vector_out;
end function;
For the final '0'
you can add them with simple concatenation.
If you have:
signal initial_signal : std_logic_vector(31 downto 0);
signal final_signal : std_logic_vector(66 downto 0);
Then you can just write:
final_signal <= '0' & '0' & '0' & '0' & add_zeros(initial_signal);