How to display list of Verilog force from Modelsim / Synopsys simulator?

Question

For the ncsim https://community.cadence.com/cadence_technology_forums/f/functional-verification/17382/ncsim-how-to-display-list-of-verilog-force-from-inside-verilog-testbench.

How to track the list of Verilog force, is there any simulator/language based summary?

Answer 1

for Synopsys/vcs-mx use the -force_list qualifier:

1. use -force_list at compilation

2. then use -force_list <filename> when you run the test.

see vcs-mx user guide for more information.