How to send only one "1" in output even when the entry stays on "1"

I'm doing some VHDL but I'm a beginner and I have an user who keep sending 1 in entry. All I want is my output to be like "10000000" and not "111111" except if the entry is "101010" then the ouput is "101010". I tried a kind-of Mealy machine.

library ieee;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_unsigned.all;

entity Button1_sync is
   port (   i_button1        : in    std_logic;
            i_clk        : in    std_logic;
            i_clk_game        : in    std_logic;
            i_rst      : in    std_logic;
            o_button1_sync  : out   std_logic);
end Button1_sync;

architecture BEHAVIORAL of Button1_sync is
    type stateType is (noPressure, Pressed);
   signal state, nextState : stateType;

begin
   process(i_clk_game,i_rst)
      begin
          if (i_rst = '0') then
              state <= noPressure;
              o_button1_sync <= '0';
          elsif rising_edge(i_clk_game) then
              state <= nextState;
          end if;
   end process;

   process(state,i_button1)
      begin
          if i_button1 = '1' then
              nextState <= Pressed;
          else
              nextState <= noPressure;
          end if; 
    end process;

    o_button1_sync <= '1' when (state = noPressure and i_button1 ='1') else '0';
end Behavioral;

but the output stay on "U"

Solution

The easiest thing to do is to shift the input signal by one clock cycle, as (in a process):

i_button1_d <= i_button1;

And then use the 2 signals to detect the rising edge of the input with the combinatory expression:

i_button1_d = '0' and i_button1 = '1'

for example in an IF in the process. The expression means that the signal was '0' at the previous clock and '1' at the current one, so just went up.
It's also very common to test with '1' and '0' to get a unique pulse at '1' at (after) the falling edge.
Then you can combine this expression with others (maybe an OR with the input or the same pulse shifted by one more cycle, for example) if needed to maintain the signal up or down!