Problem in VHDL: led tratrix displayed even button wasn't pressed

Question

Sorry for unclearly title, becasue i don't know how to describe it in one sentence.

This is my problem, i'm trying to make a led matrix 8x8 with altera EPM240T100 kit, which display text throught UART. When text transmitted to altera kit, there is a button to active led matrix. Button is linked with a led, when button is pressed, led will be ON state. But this is my problem,after the kit was programmed, the led matrix has displayed immediately even when the button hasn't press yet. And the led, it only active when i press the button. I think i've confused about state of button and i tried to change state of button from button = '1' to button = '0' but nothing changed except that the state of led is reversed.

My code is showed following:

library IEEE;
library giang;
use giang.define.all;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity UART_arr is
    Port( Clk : in std_logic;
            button: in std_logic;
            led: out std_logic;
            input: in std_logic;
            output: out std_logic;
            msg_input: out msg);
end UART_arr;

architecture Behavioral of UART_arr is
    component UART_RX is
        Port( Clk: in std_logic;
                RX : in std_logic;
                data_out : out std_logic_vector(7 downto 0);
                RX_done  : out std_logic
             );
    end component;
    component UART_TX is
        Port( Clk: in std_logic;
                TX_En : in std_logic;
                data_in : in std_logic_vector(7 downto 0);
                TX : out std_logic
             );
    end component;
    signal msg_buff: msg := (others=>"00000000");
    signal rx_byte,tx_byte : std_logic_vector(7 downto 0) := (others => '0');
    signal rx_done,tx_en     : std_logic := '0';
    signal i: integer range 0 to 32 := 0;
    signal led_t: std_logic := '1';
begin
    RX: UART_RX port map (Clk,input,rx_byte,rx_done);
    TX: UART_TX port map (Clk,tx_en,tx_byte,output);

    button_check: process(button)
    begin
        if button = '0' then
            led_t <= '0';
            msg_buff(1) <= "01100001";
            msg_input <= msg_buff;
        else
            led_t <= '1';
        end if;
    end process;
    led <= led_t;

This is only a part of my code and it hasn't done yet. There are some data type i have defined in other package: type msg is array (1 to max_char) of std_logic_vector(7 downto 0);

And one more thing is when i delete code line else led_t <= '1', both of led and led matrix didn't work.

So can anyone solve this problem? If there are something unclearly due to my bad english, please question. Thanks.

Answer 1

I have relized why my poblem happended. Acording to simulation result, i saw that my sigal is at high level state in first clock period cause unexpected result.