I have this input vector that i have to subtract from my internal variable
entity f11 is
Port ( CLK : in STD_LOGIC;
ANIMATE : in STD_LOGIC;
MAKE : in STD_LOGIC;
X_vga : in STD_logic_vector(6 downto 0);
Y_vga : in STD_logic_vector(6 downto 0);
X_pos : out STD_logic_vector(6 downto 0);
Y_pos : out STD_logic_vector(6 downto 0);
VALID : out STD_LOGIC
);
end f11;
architecture basic of f11 is
TYPE data_out IS ARRAY(0 TO 5) OF std_logic;
TYPE mem_data IS ARRAY(0 TO 6) OF data_out;
SIGNAL ALIVE : STD_LOGIC := '0';
variable f11_data : mem_data := (
( '0', '0', '0', '0', '1', '0'),
( '0', '0', '0', '1', '0', '1'),
( '0', '1', '1', '0', '1', '0'),
( '1', '1', '1', '1', '0', '1'),
( '0', '1', '1', '0', '1', '0'),
( '0', '0', '0', '1', '0', '1'),
( '0', '0', '0', '0', '1', '0')
);
variable pos_x : integer := 8;
variable pos_y : integer := 8;
variable xvga : integer ;
variable yvga : integer ;
process(CLK)
begin
if(rising_edge(CLK)) then
xvga:= to_integer(unsigned(X_vga));
yvga:= to_integer(unsigned(Y_vga));
if(MAKE = '1')then ALIVE <= MAKE;end if;
if( xvga <= pos_x + 5 and yvga <= pos_y + 6 ) then
VALID <= f11_data ( xvga - pos_x )(xvga - pos_y) and ALIVE ;
end if;
end if;
end process;
X_pos <= pos_x;
Y_pos <= pos_y;
end basic;
It keeps giving me an error that
Error (10482): VHDL error at f11.vhd(53): object "to_integer" is used but not declared
and I really don't know how to get around this problem or is there any other way for me to subtract these two values, is there some reference material that i can look into couse I'm really new to this stuff, THANKS !
You need to use numeric_std from the IEEE library to use to_integer.
Add this to the top of your file:
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;