How to implement a watchdog timer on a Cyclone II FPGA in quartus ii

I need to implement a watchdog timer on my Cyclone II FPGA board. I have designed the system using QSYS, i need to know what are the next steps to implement and test a watchdog Timer.

Solution

To implement a watchdog with qsys you can use the "Interval Timer" in library : "Processors and Peripherals" -> "Peripherals" -> "Interval Timer". Then configure it as a watchdog.

For testing it, it depend to your application. We need more information on your project architecture.

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