IS_X function synthesis

Question

I have some problems in synthesizing an entity which employs the function IS_X(). In particular, the message

[Error] name IS_X is unknown

is shown.
Is it synthesizable?

library IEEE;
use IEEE.std_logic_1164.all;

entity FF2 is
    generic(XOUT, XNOUT: std_logic);
    port(   INPUT, CLK: in std_logic;
            OUTPUT, NOUTPUT: out std_logic
    );
end entity FF2;

architecture behavioral of FF2 is

    signal temp : std_logic := '0';
    begin
        FUNC:process(CLK)
        begin
            if(CLK'event and rising_edge(CLK)) then
                temp <= INPUT;
            end if;
        end process FUNC;

        OUTPUT <= XOUT when is_x(temp) else temp;
        NOUTPUT <= XNOUT when is_x(temp) else (not temp);

end architecture behavioral;

Answer 1

What do you mean by synthesizable? Using is_x to create hardware should not be supported by a synthesis tool since in hardware there is only 0 and 1, and after synthesis there is nothing that can be created for your code:

OUTPUT <= XOUT when is_x(temp) else temp;
NOUTPUT <= XNOUT when is_x(temp) else (not temp);

OTOH, using is_x in a report statement should be ignored by your synthesis tool (meaning a supported use of is_x to report simulation issues) as it does not create any hardware:

assert not(is_x(temp)) report "captured X on input" severity error;

This is helpful for debug, particularly in statemachine where there is lots of X masking. If your synthesis tool does not accept this, be sure to submit it as a bug to the vendor - and report them here.