Verilog conditional hardware based on parameter value

Question

Is it possible to create conditional hardware in Verilog depending on the value of a parameter? Something like this

module test #(
 parameter param = 1
)(
  input wire clk
);

reg[3:0] counter = 0;

always @(posedge clk) begin
  `ifdef (param == 0)          // <-----
    counter <= counter + 1'b1;
    // ... more hardware here
  `else
    counter <= counter - 1'b1;
    // ... a different hardware here
  `endif
end

endmodule // test

EDIT:

I wanted to mention that both answers given by Serge and Unn give a solution to the implementation I was looking for. See the comments to the answers for more details.

Answer 1

actually there are generate blocks which were invented for this reason:

module test 
  #(parameter param = 1)
   (input wire clk);

   reg [3:0]  counter = 0;

   generate
      if (param == 0) 
        always @(posedge clk) begin
           counter <= counter + 1'b1;
           // ... more hardware here
        end
      else
        always @(posedge clk) begin
           counter <= counter - 1'b1;
           // ... a different hardware here
        end
   endgenerate
endmodule // test