What is meant by writing the following lines?
OR AX,AX
JGE LABEL
To my knowledge, OR is not a comparison operator. And, Branching statements like, "JGE/JE/JL" can only be used only when I have used them after any Comparison process by CMP.
It's an alternative to cmp ax, 0
to set FLAGS according to a value,
but the preferred way which also does the same thing is test ax,ax
.
or
instruction is bitwise operation, not comparison, so you are right in the first thing.
But about branching you are completely wrong, the conditional jump Jcc
doesn't care what instruction was executed before it, it will only check the flag register EFLAG
for certain conditions. (basically no instruction in CPU cares about previous instruction, it's state machine and each instruction is well defined how it will modify current state of CPU, and state of CPU is content of registers (but all of them, segment registers, also (E)FLAG
is register and there are few control registers, and on modern x86 CPU also the FPU and MMX/SSE unit registers).
And the or
will modify flag registers too, as many other instructions:
The OF and CF flags are cleared; the SF, ZF, and PF flags are set according to the result. The state of the AF flag is undefined.
And the JGE
is:
Jump short if greater or equal (SF=OF).
The OF will be zero after OR
, and SF will be equal to the top bit of ax
(for values 0x0000 .. 0x7FFF
it will be 0, for values 0x8000 .. 0xFFFF
it will be 1). So the branching jump will be executed when ax
is value from range 0 .. 0x7FFF
(32767).
It's the common, but unoptimal idiom for testing register against zero, the better way is test ax,ax
, which is again bitwise operation (and
), but the results is discarded, and only flags are modified, modern x86 CPUs understand this idiom and it has the same or better performance than cmp ax,0
. The OR
may internally store the result of operation back into ax
, which may result in less optimal performance than test
.
You can use the conditional jump any time, it will check the value in FLAGS
register, so one old optimization from Pentium-like era was to do CMP
few instructions ahead to give CPU time to write the change to FLAGS
and execute between some instructions not affecting flags (like MOV
and similar), but on modern x86 this is counter-performance measure, as modern unit will upon decoding pair of instructions cmp something
jge label
treat them in special way, sort of as single operation... but these are all performance related details, which require the knowledge of the underlying micro-architecture of particular target x86 CPU, if you are just learning basics of 8086, there's no need to worry about these yet, focus first to correctly understand what instructions do, so you can read any asm source, and together with the instruction guide you can deterministically predict what will be result of such code, understanding all the changes going on in the CPU on the high (registers/memory content) level. Whether some code takes one more clock to execute is less important in the beginning.