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vhdlarithmetic-expressions

VHDL -1 rem 4 returns 3, why?

Take the following VHDL code:

to_signed(-1, 32) rem to_signed(4, 32)

From what I understand from various sources and this SO question this should produce the result -1, but it returns 3, just as mod. Why?

Thank you!

Solution

  • Oh no it doesn't...

    As an MCVE :

    library ieee;
use ieee.numeric_std.all;

entity rem_tb is
end rem_tb;

architecture arch of rem_tb is
begin
    assert false report "Result : " & integer'image(to_integer(to_signed(-1, 32) 
                                    rem to_signed(4, 32))) severity NOTE;
end arch;

    compiled with ghdl:

    ghdl -a rem_tb.vhd
ghdl -e rem_tb
ghdl -r rem_tb

    it replies

    rem_tb.vhd:11:1:@0ms:(assertion note): Result : -1

    So ... which simulator are you using? What does that simulator do with the MCVE?