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VHDL arithmetic shift_left

With the shift_left function of ieee.numeric_std, I want to shift a signal to left and insert 1 or 0 from the right.

signal qo: signed (3 downto 0) := (others=>'0');
qo <= shift_left(qo,1);

That will only insert 0 from right. I want to insert 1 upon some conditions.

Solution

  • Instead of using the shift_left function, how about using slicing and concatenation:

    qo <= qo(2 downto 0) & '1';

    or

    qo <= qo(2 downto 0) & '0';

    Personally, I recommend using slicing and concatenation for shifts and rotates. There are issues with the operators (sra etc) and, as you can see, using slicing and concatenation gives you complete control.