I am using Altera De0 nano Soc FPGA, and Quartus 16.1 lite edition. After doing a search on internet, I found that to get sin, cos and atan Altera's CORDIC IP core can be used directly. And also found lookup table (LUT) can be used for sin or cos (mostly available in google) but how to get sin inverse (ARCSIN) in VHDL?
I have found a sin and cos lookup table, is there a way to generate sin inverse?
Yes, it's possible to generate a lookup table for arcsin.
1) Determine the input precision, in other words how many values you want to keep in your lookup table. For example, you need to store 11 values if your precision is 0.1.
arcsin(0), arcsin(0.1), arcsin(0.2), ..., arcsin(1).
2) Find the results of arcsin functions. Here is a source I found by googling.
arcsin(0) = 0
arcsin(0.1) = 5.7
arcsin(0.2) = 11.5
...
arcsin(1) = 90
3) Determine the output precision.
If the precision is 1, all values are rounded to integers.
arcsin(0.1) = 6
arcsin(0.2) = 12
If the precision is 0.5, the results are as below. The output needs 9-bit size for this precision. 8 bits are for the integer part and 1 bit is for the fractional part.
arcsin(0.1) = 5.5
arcsin(0.2) = 11.5
4) Map input values to addresses of the lookup table. For example, it should be like below for 0.1 precision. This example doesn't require an additional lookup table or big logic for address mapping.
0 -> 0
0.1 -> 1
0.2 -> 2
...
1 -> 10
5) Implement this lookup table in VHDL like the ones you've found for sin or cos.