How to handle bidirectional pin (inout) in a verilog task

I want to use a bidirectional data bus in my controller.Here's the code

module controller ( clk, data_out);
// Port Declaration
input   clk;
inout   [7:0] data_out;

reg     [7:0] a;
reg     [7:0] b;
wire    [7:0] c;

// data should write to data_out (data_out act as output)

task write; 
input c;
begin

assign data_out = a;
data_out <= c;

end
endtask

// data should read from data_out (data_out act as input)

task read; 
output b;
begin

assign data_out = 8'bz;
b <= data_out;

end
endtask

endmodule

when I compile this i'm getting an error saying

LHS in procedural continuous assignment may not be a net: data_out.

it's says there is an error in assign data_out = a; and assign data_out = 8'bz; I know assign should be done in always or initial block but in a task using those blocks are useless/give eroor

Then, how we can change directions of the bus in side a task??

Solution

You shouldn't use assign in initial and always blocks. I don't get why you necessarily want it in task? Simply use assign alone. Assinging value to bidirectional port needs a flag that specifies what action- read or write- should be done. Syntax is like:

  assign bidir_port = [flag] ? a : 1'bz;