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microcontrollergpio

GPIO Data Register description understanding

I have a question regarding a new Datasheet I have for a new SoC. Let`s say the base address is 0x2014_0000

Here is the page

enter image description here

So what does that mean with the 0x3fC and 0x200?

Does it mean that if I read register 0x2014_0000 and it gives me 0x3fc than I can do write or read operations according to the Direction register for all related GPIOs. And if it reads 0x0 than I cannot do anything with the data (no read or write access)?

Whenever I had to read the data from an Register I only had to read the corresponding bit but this one confuses me @_@

Maybe someone can explain it to me

Thx

Solution

  • My reading of this data sheet is that PADDR is a subset of the address bus, and bits 9:2 mask the operation of GPIO_DATA bits 7:0. It says:

    So that independent software drivers can set their GPIO bits without affecting any other pins in a single write operation, the address bus is used as a mask on read/write operations. The data register effectively covers 256 locations in the address space. The eight address lines used are PADDR [9:2].

    This means that you can write to GPIO_DATA at any of 256 addresses, and only those bits which correspond with the address will be written, and indeed the table you show says that GPIO_DATA is mapped at offsets 0x000 - 0x3FC so the 256 locations are in steps of 4 (the control bits derived from the address bus are shifted twice to map to the port bits).

    So to your question "what does that mean with the 0x3fC and 0x200?" This is described in the image you show: writing data to those address offsets will affect the port bits mentioned in the text. In the first case, all of them, in the second, only one of them.

    Address     0x20140200

PADDR       9        0
            10000000xx

GPIO_DATA   7      0
            Nxxxxxxx

    So only the value in bit 7 is written to the GPIO output, the remaining GPIO output bits are preserved.