I feel I have put it a decent effort in searching for a solution to my problem online, but can't find what I need in order to accomplish my goal.
Essentially, what I need to do is parse data from a file being received by my FPGA through serial. The data is fairly extensive and I think it would be easier if were able to use some of the functions inside of the textIO library.
All of the techniques I have found online reffering to data parsing is only for simulation. I need this to actually happen on the FPGA.
So my question is, is there a way to create a file internally on the FPGA and have the input from serial write to it then be able to use the textIO functions on that txt file?
Some psuedo code might look somthing like:
File_Open("newFile.txt", write) --If it doesn't exist, then create it
write(SerialByteStream, newFile.txt) --Collect serial data onto txt file
Then run textIO function on newFile.txt in order to use the data in newFile.txt
Also, it's worth mentioning that I am new to FPGA's and VHDL, so it could be that there is a trivial solution that I am not aware of. And I'm using VHDL with the Altera DE2-115.
I appreciate any help.
No, what you are proposing is not possible. As you have found, VHDL's file i/o are really just instructions to the simulator to do something. Note the distinctions between synthesisable and non-synthesisable VHDL. You can only program the synthesisable part of your VHDL into an FPGA, and this usually won't include file related libraries.
Complex file operations are a general purpose processing task - what PCs do. Your best avenue of investigation is probably to reconsider what you want the FPGA for in the first place and focus on that.
Some possibilities:
If the FPGA is only to provide an interface to read and write some byte stream onto a PC, perhaps you should do precisely that. Do the data processing on the PC. Transferring the data is still not trivial, but in this case you needed to solve that problem anyway.
If you need the FPGA for some high performance computations, see if you can pre-process and provide that data in a format that is easier for your design to digest.
If really necessary, processing your serial byte stream with VHDL may not be as hard as it sounds, especially if you only need to operate on it linearly. Probably you need a design involving at least one state machine that parses your serial byte stream, but the rest all depends on the details of your problem.
If you really need complex processing ON the FPGA, consider using a soft core CPU. There may be open source ones that fit on your FPGA. Whatever you want to do may be easier to write in C, which you can then compile and run on the FPGA. That option gives you a very flexible standalone hardware component, but if you need very high performance or it you do not have much time to set it up, this is probably not right for you.