How to fill a vector bit by bit

Question

I have a 12 bits vector called RDIBits and a in std_logic called InUartToUart. My question is: every time the clock goes to '1', i receive a bit in InUartToUart, and i want to concat all the 12 bits that i will receive in the RDIBits vector. Basically, its a serial communication, thats why i receive 1 bit each time. Is there any simple way to do this? Something similar to RDIBits += InUartToUart in JAVA.

Answer 1

I would code this slightly differently. Maybe consider this. Sorry about the formatting, Im new to this site. I have also shown how you can initialise the variable.

signal RDIBits : std_logic_vector(11 downto 0) := (Others => '0');

...
process(clk)
begin
    if ( rising_edge(clk) ) then
        RDIBits(11 downto 1) <= RDIBits(10 downto 0);
        RDIBits(0) <= InUartToUart;
    end if;
end process;