Basically, literally every VHDL file I've ever seen has a header of something like:
library ieee;
use ieee.numeric_std.all;
use ieee.std_logic_1164.all;
This seems to splat the entire contents of the relevant library into the current namespace-analog (whatever VHDL calls it, it doesn't seem to have an explicit name in the VHDL manual, or I'm reading it wrong).
Is there any way to not just splat everything into the current namespace?
Removing the .all postfix seems to partially work (types have to be specified by their full paths), but it seems to break all operator overloading done by the relevant types.
Just to expand on the comments, all you need to do is delete the .all from the use clause and only import what you need.
If that includes operators and literals, the compiler will tell you what is missing...
ghdl -a test_qualified.vhd
test_qualified.vhd:14:10: no function declarations for operator "not"
test_qualified.vhd:15:10: can't match character literal '0' with type std_ulogic
test_qualified.vhd:15:21: no function declarations for operator "="
test_qualified.vhd:15:30: can't match character literal '1' with type std_ulogic
ghdl: compilation error
Simply import those too.
library ieee;
use ieee.std_logic_1164;
use ieee.std_logic_1164."not";
use ieee.std_logic_1164."=";
use ieee.std_logic_1164.'0';
-- use ieee.std_logic_1164.'1';
entity test_qualified is
end test_qualified;
architecture test of test_qualified is
signal a,b,c : ieee.std_logic_1164.std_logic;
begin
a <= not b;
c <= '0' when a = b else ieee.std_logic_1164.'1';
end test;
Apparently, not many people feel they need this level of control of the namespaces. But it is possible.
If I found myself repeating this fine control in different compilation units, I'd learn about VHDL-2008's context keyword and declare a context specific to my application.