HELP with my VHDL code trying to select what input go to the output with a IF statement using a WITH XXX Select
s is the select d and e are for the 4 input y is the output
Help Thanks
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
ENTITY mux_4_1 IS
PORT(
S : in STD_LOGIC;
d : IN STD_LOGIC_VECTOR (3 downto 0);
e : IN STD_LOGIC_VECTOR (3 downto 0);
y : OUT STD_LOGIC_VECTOR (0 to 6));
END mux_4_1;
ARCHITECTURE behavior OF mux_4_1 is
BEGIN
PROCESS(S,d,e)
BEGIN
IF S = '0' THEN
WITH d SELECT
y <= "1111110" WHEN "0000",--0
"0110000" WHEN "0001",--1
"1101101" WHEN "0010",--2
"1111001" WHEN "0011",--3
"0110011" WHEN "0100",--4
"1011011" WHEN "0101",--5
"1011111" WHEN "0110",--6
"1110000" WHEN "0111",--7
"1111111" WHEN "1000",--8
"1111011" WHEN "1001",--9
"0000000" when others;
ELSE S = '1' THEN
WITH e SELECT
y <= "1111110" WHEN "0000",--0
"0110000" WHEN "0001",--1
"1101101" WHEN "0010",--2
"1111001" WHEN "0011",--3
"0110011" WHEN "0100",--4
"1011011" WHEN "0101",--5
"1011111" WHEN "0110",--6
"1110000" WHEN "0111",--7
"1111111" WHEN "1000",--8
"1111011" WHEN "1001",--9
"0000000" when others;
END IF;
END PROCESS;
END behavior;
Error (10500): VHDL syntax error at mux_4_1.vhd(23) near text "WITH"; expecting "end", or "(", or an identifier ("with" is a reserved keyword), or a sequential statement
Error (10500): VHDL syntax error at mux_4_1.vhd(25) near text "WHEN"; expecting ";"
The only mistake I can see from what you gave is that there is no then after an else statement.