Why does the indexer in indirect addressing have to be a dword?

For example, this doesn't work:

.data
arr dword 10 dup(?)
.code
...
mov bx, 2
call [arr+bx*4] ;;error A2032:invalid use of register

But using ebx instead of bx would work, why?

Solution

Because not all the 24 addressing modes have been introduced at the same time, some are not available with 16 bits registers.

In an instruction the addressing mode is encoded within the bytes modRM and SIB:

The possible 16 bit addressing modes are:

As you can see, there is no [bx*4] + disp16, for that a SIB would be needed, but SIB can only specify 32 bits registers (64 bits registers with a REX prefix):

You can find all the relevant technical notes on Intel manual 2