Search code examples
vhdlquartus

How do I make Quartus II compile faster


I'm using Altera Quartus 2 to do a custom 8 bit processor and it takes forever to compile on my laptop. I'm only using simulations and making my processor in schematic (block diagram) and VHDL. Right now it takes around 10 minutes to compile, which is a pain since I'm more on the debugging phase of the project where I have to fix up the internal timing and make lots of very little changes to see what happens.

I'm not actually putting it on a FPGA, so do I need the compiling phases of "fitter" and "assembler"?

Can I change the contents of a memory file of one lpm_ram_dq and test it in simulation without recompiling?

In summary anyone knows how to make it compile faster?


Solution

  • In order of decreasing important.

    • More memory. 4 GB for a 32-bit OS. Some designs need more that that and require a 64-bit OS.
    • Don't overconstrain the design.
    • Change the compilation options to not try as hard. That's under assignments> settings> Fitter Settings>Fast Fit (or Auto Fit)
    • 8.1 supports multiple cores.
    • Hiearchical compiles help, especially if you have multiple instances of the same block.

    2 minutes is really short, I agree with the previous poster. A single gate will that take long.