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MSP430 - XT1 Crystal turning OFF in LPM3

I am using MSP430F6638 controller. As per the Datasheet ACLK and the Source clock from which ACLK is derived from will NOT be turned OFF in LPM3 (Deep SLeep).

But in my case, As soon as i enter the LPM3, XT1 stops oscillating.

The above mentioned scenario is occuring ONLY when the XT2 crystal is being Turned OFF. And if XT2 is NOT turned OFF and then enter to LPM3, The XT1 remains Oscillating.

How I am configuring the Clocks

  P3SEL |= BIT4; // SMCLK
  P3DIR |= BIT4;
  
  P7SEL |= 0x0C; // P7.3,2 -> XT2OUT, XT2IN
  
  // Unlock XT1 pins for operation
  while(BAKCTL & LOCKBAK)
  {
    BAKCTL &= ~(LOCKBAK);
  }
  
  // From XT2 = 16 Mhz
  UCSCTL6 |= XCAP_2; // Fz 120216: Internal load cap (CAP Value + 2)/2 = 8.5pF (Refer Datasheet)
  UCSCTL6 &= ~(XT1DRIVE1 | XT1DRIVE0 | XT2DRIVE1);
  UCSCTL6 |= (XT2DRIVE0);
  UCSCTL6 &= ~XT2OFF;       // Set XT2 On
  UCSCTL6 &= ~XT1OFF;       // Set XT1 On
  UCSCTL3 = 0x0021; // FLL : REFOCLK and divby2
  
  do
  {
    UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG); // Clear XT1 fault flags
  }while(UCSCTL7 & (XT2OFFG + XT1LFOFFG)); // Test XT1 fault flag
  
  __bis_SR_register(SCG0); // Disable the FLL control loop
  
  UCSCTL0 = 0x1F00; //Range
  UCSCTL1 = 0x50; //Range
  UCSCTL2 = 0x1138; // MCLK : 5 Mhz
  
  _delay_ms(100);
  
  // Clock Source Selection :
  UCSCTL4 = 0x0054;     // ACLK : XT1CLK; SMCLK : XT2CLK; MCLK : DCOCLKDIV
  UCSCTL5 |= DIVS1;     // SMCLK div by 4 (4 Mhz)
  
  UCSCTL3 |= 0x0021;      // FLLRef : REF0; FLLRef/2 => MCLK = 5Mhz
  
  // Enable the FLL control loop
  __bic_SR_register(SCG0);
  
  // Loop until XT1,XT2 & DCO fault flag is cleared
  do
  {
    UCSCTL7 &= ~(XT2OFFG | XT1LFOFFG | DCOFFG); // Clear XT2,XT1,DCO fault flags; XT1HFOFFG
    
    SFRIFG1 &= ~OFIFG; // Clear fault flags
    
  }while(SFRIFG1 & OFIFG); // Test oscillator fault flag

HOW I am turing OFF the XT2 :

UCSCTL6 |= (SMCLKOFF);
_delay_ms(10);
UCSCTL6 |= (XT2OFF);

Crystal Sources

XT1 : 32.768 Khz

XT2 : 16 Mhz

Peripherals Depending on ACLK (and hence on XT1)

UART baud generation

Watch Dog Interrupt

Once I enter the LPM3, I expect the WDT timer to wake the controller from Deep Sleep, but observed that XT1 gets turned OFF immediately as i enter the LPM3 ( also tried LPM0) and hence the controller never wakes up from Sleep.

What I already Made Sure :

I made sure that the Interrupts are working (while in LPM3)

Working Fine in the following Scenarios

  1. When USB is connected ( XT2 is active )

  2. XT2 NOT Turned OFF

  3. Debugger/Emulator Connected ( I understand that LPM doesnt entirely work with Emulator connected)

Tried this page : https://e2e.ti.com/support/microcontrollers/msp430/f/166/t/131760

Also tried the ERRATA UCS11 error. (I assume this is not needed while turning OFF XT2)

Thanks in Advance.

Solution

  • The issue is solved. Replying to my own question so someone else may find it helpful.

    In my design, the VBAT Pin was left unconnected. As per the user's manual it should be connected to DVcc when not used.

    Connecting the VBAT to DVcc solved the problem.

    I have no clue why the XT1 was relying on VBAT supply when the DVCC was not turned off.

    Anyways, the issue is solved :)