Trying to perform addition of two fractional fixed_point operands in VERILOG, I'm stuck in this error

Question

I'm trying to write a Verilog synthesizable program for adding two fractional fixed_point numbers. This is the test bench:

module sum_test;

// Inputs
reg [12:-20] oper1;
reg [12:-20] oper2;
reg cin;

// Outputs
wire [12:-20] sum_result;

// Instantiate the Unit Under Test (UUT)
sum_fix uut (
    .oper1(oper1), 
    .oper2(oper2), 
    .cin(cin), 
    .sum_result(sum_result)
);

initial begin
    // Initialize Inputs
    oper1 = 0;
    oper2 = 0;
    cin = 0;

    // Wait 100 ns for global reset to finish
    #100;

    // Add stimulus here
oper1 = 12.5;
oper2 = 5.4;

end

initial begin
    $monitor("oper1=%d,oper2=%d,sum_result=%d \n",oper1,oper2,sum_result);      

end

endmodule

/// This is the addition module

module sum_fix(

input [12:-20] oper1,
input [12:-20] oper2,
input cin,
output [12:-20] sum_result
);

assign sum_result = oper1 + oper2 + cin;
endmodule

Simulator print this,

oper1= 0,oper2= 0,sum_result= 0

oper1= 13,oper2= 5,sum_result= 18

It seems I'm not introducing the numbers correctly in the testbench or something, it might be that simulator can't work with this notation? BTW I made this module inspired in the book "Digital Design (Verilog)" of Ashenden. He speaks about this fixed-point fractional notation and even make an addition like me with the operator "+", so I don't know what's wrong, he didn't make test bench for this example, though. Thank you everybody, this forum rocks.

Answer 1

Try using :

reg [32:0] oper1;
reg [32:0] oper2;

instead of :

reg [12:-20] oper1;
reg [12:-20] oper2;

And stimulus is :

oper1 = 12.5 * 2**20; //shift 20 binary places
oper2 = 5.4  * 2**20;